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Multi-channel memory architecture
In the fields of digital electronics and computer hardware, multi-channel memory architecture is a technology that increases the data transfer rate between the DRAM memory and the memory controller by adding more channels of communication between them. Theoretically this multiplies the data rate by exactly the number of channels present. Dual-channel memory employs two channels. The technique goes back as far as the 1960s having been used in IBM System/360 Model 91 and in CDC 6600.
Modern high-end processors like the Intel i7 Extreme series and various Xeons support quad-channel memory. In March 2010, AMD released Socket G34 and Magny-Cours Opteron 6100 series processors with support for quad-channel memory. In 2006, Intel released chipsets that support quad-channel memory for its LGA771 platform〔.〕 and later in 2011 for its LGA2011 platform.〔.〕 Microcomputer chipsets with even more channels were designed; for example, the chipset in the AlphaStation 600 (1995) supports eight-channel memory, but the backplane of the machine limited operation to four channels.〔.〕
== Dual-channel architecture ==
Dual-channel-enabled memory controllers in a PC system architecture utilize two 64-bit data channels. Dual channel should not be confused with double data rate (DDR), in which data exchange happens twice per DRAM clock. The two technologies are independent of each other and many motherboards use both, by using DDR memory in a dual-channel configuration.
抄文引用元・出典: フリー百科事典『 ウィキペディア（Wikipedia）』
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